Transistors are only on and off switches when run in saturation. This is relevant to CPUs in the sense that the rising/falling edge and jitter affect the setup and hold times and thus the maximum clock rate. End pedantry.
Yes, but you knew about that because it was also news.
Ya, I'm not into the aesthetic but it does represent the societal progress in parental roles.
I don't understand how anyone older than a literal child would talk like you, tbh. And assume so much based on a joke to boot.
Hell ya. I keep weed in mine.
I'd tour that factory
2 tru
I don't even know the story behind this bitch right here. The damn thing is lived in, though.
Ima ask an uncle tomorrow. An old man passed recently round here. If they got his stick man, damn, respect.
Ride or die mf right here.
Great. Now I have an absolute banger stuck in my head.
True, fair, and open minded. But if that were the case, though, then the question wouldn't need to be asked.
THEY'RE ... fine, actually. Pretty good.
Old widow and a g pro. Not exactly a deep cut, but it was really fun!
There's an active region between on and off where the current from the collector to emmiter is proportional to the base current. This can be used in other applications like amplifiers. But in digital applications that active region is the transition time between low and high states.
In order to obtain a deterministic outcome the rising edge must be predictable and it must stay at a logic level 1 for long enough to account for propagation delay. These considerations are known as setup and hold. The higher the frequency the clock runs, the tighter these constraints become.