Marcelo

joined 2 years ago
[โ€“] Marcelo@discuss.tchncs.de 4 points 2 years ago (1 children)

In the paper, RTL stands for Register Transfer Level, in the domain of digital circuit design -> https://en.wikipedia.org/wiki/Register-transfer_level

Sorry about that, I should have spelled out RTL as Register Transfer Level in the paper. But yeah given the references to Verilog and hardware design it can be deducted...