What's Being Done?

13:30 - the systems deployed for both companies with either one of these processors to within one percentage Point are experiencing the same stability issues even disabling ecores has not fully resolved the issue for one of these companies the error rate also seems to be going up over time on the server side

Video version: https://youtu.be/0PrmrMQ9gJU

In February 2024, Intel held its first Intel Foundry Direct Connect event. [...] The tone of the event was one of success – Intel Foundry (IF) is set to be a semi-autonomous body of Intel that aggressively fights for business, whether Internal or External, without playing favorites.

[...]

Ian: It’s been said in the past that Intel bets the whole company on the next process node, is that still true?

Pat: I’ve bet the whole company on 18A. We have committed products to this - it is the culmination of our 5 nodes in 4 years. So bringing that across the line, in that sense yes - I’ve bet the whole company on making this successful.

cross-posted from: https://lemmy.world/post/11840660

TAA is a crucial tool for developers - but is the impact to image quality too great?

For good or bad, temporal anti-aliasing - or TAA - has become a defining element of image quality in today's games, but is it a blessing, a curse, or both? Whichever way you slice it, it's here to stay, so what is it, why do so many games use it and what's with all the blur? At one point, TAA did not exist at all, so what methods of anti-aliasing were used and why aren't they used any more?

TAA is a crucial tool for developers - but is the impact to image quality too great?

For good or bad, temporal anti-aliasing - or TAA - has become a defining element of image quality in today's games, but is it a blessing, a curse, or both? Whichever way you slice it, it's here to stay, so what is it, why do so many games use it and what's with all the blur? At one point, TAA did not exist at all, so what methods of anti-aliasing were used and why aren't they used any more?

Here are some initial benchmarks of the Grace CPU performance while the Hopper GPU benchmarks will be coming in a follow-up article.

NVIDIA's GH200 combines the 72-core Grace CPU with H100 Tensor Core GPU and support for up to 480GB of LPDDR5 memory and 96GB of HBM3 or 144GB of HBM3e memory. The Grace CPU employs Arm Neoverse-V2 cores with 1MB of L2 cache per core and 117MB of L3 cache.

On a geo mean basis across all the benchmarks conducted, the GH200 Grace CPU performance nearly matched the Intel Xeon Platinum 8592+ Emerald Rapids processor. The Arm Neoverse-V2 based Grace CPU tended to be much faster than the 128-core Ampere Altra Max AArch64 server.

Overall the NVIDIA GH200 CPU benchmarking was quite fascinating to see its early potential. There still are some workloads not too well optimized for AArch64 and in some cases the higher core counts and dual socket configurations available with Intel Xeon Emerald Rapids and AMD EPYC Genoa(X) / Bergamo could drive the results much higher.

While today we have both the AMD EPYC “Genoa-X” and “Bergamo” launches, Bergamo is clearly the more impactful of the two. That is a lot to say given we know that Microsoft Azure is very fond of Milan-X and Genoa-X. Let us put together a few key points:

• The primary change for Zen 4c cores from Zen 4 is a halving of L3 cache.
• The AMD EPYC 9754 is showing performance ~3x a 128-core Arm competitor at 1.5x the power.
• An AMD EPYC 9754 is often twice the performance of 2019’s AMD EPYC 7002 “Rome” 64-core parts.
• On most non-HPC-focused workloads, expect the AMD EPYC 9754 to be 15-20% faster than the AMD EPYC 9654. That is not a straight 33% as we would expect due to the core count increase, but AMD is getting scaling from the increased core count even with a drastically reduced L3 cache size.
• AMD seems to have figured out an elegant way to reduce turbo clock jitter, especially at maximum load. That helps a lot with SLA on a loaded system.
• Cloud-native processors will make up a huge segment of the market.

We have a video for this one that you can find: https://www.youtube.com/watch?v=BxLBLEeq6yg

This tour of AMD's Austin Headquarters features labs from around the sprawling campus, allowing us a never-before-seen look at the tools used by a hundred-billion dollar chip designer. During these tours, we get to see unreleased prototypes - like vapor chamber heatspreaders, first-party direct die plates, and unnamed CPUs - while also learning about the technology and tools used to test and design AMD's Ryzen (Zen) processors. The tour goes through the Bring-Up Lab, the codename "red door" lab, a thermal engineering lab, the device failure analysis lab, and an IHS etching facility.

This tremendous manufacturing capability advantage Intel had in the past, again turned into a disadvantage. The test times have no business being 2x to 3x that of a competitor like AMD, given final chip field reliability is not really differentiated.

Intel believes charging business units more directly for test, sort, and bin will make the business units more conscious about what test strategies they use within designs and lead to savings of ~$500M a year.

"35% Smaller than Zen 4, but with Identical IPC"

It is very impressive to keep all of Zen 4's functionality and only sacrifice frequency and L3 for almost double the core density. I hope They will release some consumer products with this in the future like a 7970x with 8 Zen4 and 16 Zen4c cores.

With the official announcement it confirmed the previous leaks, for a more detailed breakdown see: https://www.semianalysis.com/p/zen-4c-amds-response-to-hyperscale